Method and apparatus for digitally measuring speed

ABSTRACT

A digital display doppler radar unit has a moving mode and a stationary mode. The incoming doppler signal, which in the moving mode, represents both speed of the radar platform and speed of an approaching target vehicle, is separated into two signal components by selective filtering. One component represents the sum of the ground speeds for the radar platform and approaching vehicles. A time base is generated by a crystal control means and .[.the time base.]. is utilized for correlating the received doppler signals, indicative of speed, with the time base. Each doppler signal component is converted to binary coded decimal (BCD) information and a digital counter counts the cycles of each received doppler signal and compares the count with an amount previously stored. Circuit means are provided to validate the received doppler signal, allowing their continual processing only after a preselected number of valid comparisons are made. The radar signal component representing the ground speed sum for the radar platform and the approaching target vehicle, and the component representing radar platform speed are combined. The radar platform speed is subtracted from the combined component, resulting in a digital count representing approaching target vehicle speed. In the stationary mode, there is no radar platform doppler pulses in the radar return and consequently, the returning pulses may be processed directly and no subtracting function is performed. Speeds corresponding to the valid received doppler signals are suitably displayed to indicate a speeding violation.

BACKGROUND AND BRIEF DESCRIPTION OF THE INVENTION

The use of doppler radar techniques for measuring the speed of movingobjects and more particularly for measuring the speed of motor vehiclesis well known in the art. By their nature, doppler return signals areoften very inaccurate. This is due to the large noise level that wouldinclude white noise, reflection difficulties due to multiple targetsand/or the dropping of pulses at critical intervals so that incorrectand erroneous displays are prevalent in many prior art devices. Ageneral solution to these prior art difficulties is given and describedin the U.S. Pat. to Berry, No. 3,689,921, issued Sept. 5, 1972, which isincorporated by reference herein.

It has become apparent that the efficiency of selective electronic speedlimit law enforcement can be increased if the radar platform,conventionally a police patrol car, is capable of movement during suchenforcement and surveillance. A number of devices also are known in theart which attempt to impart movement capabilities to the radar platform.While these devices work well for their intended purposes, they oftenare inaccurate or are dependent, in generating a speed solution, onfactors other than the mere reflected return of a generated frequency.When the radar platform is moving, at least two doppler return signalsare produced simultaneously and these signals create a complex wave formfor the radar receiver input. One larger doppler signal component willbe generated by the reflected waves from the road and the otherstationary objects, with its frequency representing the speed of theradar platform. A second doppler signal component is generated by thewaves reflected from an approaching vehicle, and since the relativespeed between the approaching vehicle and the patrol car is the sum oftheir two ground speeds, this doppler signal component frequency willrepresent the sum of two ground speeds. It should be noted that thesecond doppler signal component's frequency always will be higher thanthe first if the patrol car and the moving vehicle are traveling inopposite directions. The radar unit of this invention isolates these twodoppler signal components by selective filtering. Alternatively, twoseparate antenna systems could be used thereby with one antenna directedto the surface while the second system is directed to the oncomingtarget vehicle. The unit counts the two frequencies digitally, subtractsthe speed of the radar platform from the doppler count of theapproaching vehicle, and automatically converts the resultant digitalcount into mile per hour units. The result is the true ground speed ofthe approaching vehicle.

In the stationary mode of operation, only one predominant doppler signalis returned, which represents the speed of the approaching vehicle. Thefiltering process is bypassed and the doppler signal frequency iscounted directly. The subtraction process is not executed since theradar platform speed is zero and the counted doppler frequencyrepresents the speed of the approaching vehicle.

If a plurality of valid comparisons are indicated over a preselectednumber of counting cycles, the speed indicated by the totalized numberof pulses is presumed valid and is accordingly digitally displayed orutilized to give either a visual or audible warning, thereby indicatinga speed violation. If a .[.non-concidence.]. .Iadd.non-coincidence.Iaddend.counter is activated, the count previously stored for possibledisplay purposes is discarded and the counting and count comparisonscheme must be recycled. In this manner, all false signals includingnoise and reflections are disregarded and only valid speed indicationsare chosen for display.

A primary objective of this invention is to provide a unique method andapparatus for use in law enforcement and vehicle speed surveillancesystems that measure the speed of an approaching vehicle when the radarplatform is moving.

Another object of this invention is to provide a radar unit of thecharacter described that provides accurate speed measurement and adirect reading of the absolute speed of a target vehicle when the radarplatform is moving.

A further object of this invention is to provide a unique doppler radarunit that validates the accuracy of a received doppler signal prior toindicating the count value of the same as a correlation to vehiclespeed.

A further object of this invention is to provide a radar unit having acomparing circuit means which will activate an audible alarm if theindicated vehicle speed equals or exceeds a preset violation speed limitselectively programmed by the radar operator.

Yet another object of this invention is to provide a doppler radar unitthat efficaciously generates a speed solution directly from reflectedwaves when both the radar platform and target vehicles are moving.

Another object of the invention is to provide a unique radar unit thatproduces a digital speed readout when both the radar platform and thetarget vehicles are moving and to obviate the need for any mechanicallinkage with the vehicle acting as the radar platform. In this manner noconnection with the host vehicle odometer is needed.

A further object is to provide a moving vehicle radar system of thecharacter described that requires but one antenna system.

Another object of the invention is to provide a unique circuitry in amoving radar of the character described that utilizes a single.Iadd.primary .Iaddend.time base with at least two received dopplersignal components. In this manner, the need for two or more.Iadd.primary .Iaddend.time bases is therefore obviated.

A still further object of the invention is to provide a unique circuitfor use with a moving radar which includes a means for ignoring thespeed of an in-range oncoming vehicle under preselected conditions.

Other and further objects of this invention, together with the featuresof novelty appurtenant thereto, will appear in the course of thefollowing description.

DETAILED DESCRIPTION OF THE INVENTION

In the accompanying drawings, which form a part of the specification andare to be read in conjunction therewith and in which like referencenumerals are employed to indicate like parts in the various views:

FIG. 1 is a block diagram of a radar unit for digitally determining thespeed of a moving object when the radar platform is in motion;

FIG. 2 is a detailed schematic diagram for the preamplifier.Iadd.,automatic gain control (AGC), .Iaddend.and power supply shown in FIG. 1;

FIG. 3 is a detailed schematic diagram for the filtering channels forthe radar unit of FIG. 1;

FIG. 4 is a detailed schematic diagram for a first circuit portion forthe radar unit of FIG. 1; and

FIG. 5 is a detailed schematic diagram for a second circuit portion forthe radar unit of FIG. 1.

Turning now more particularly to the drawings, reference numeral 1indicates the radar unit of this invention. The unit 1 includes amicrowave circuit 2 .Iadd.and mixer .Iaddend.electrically connected toan antenna (not shown). The microwave .[.circuit.]. .Iadd.circuits.Iaddend.2 .Iadd.and 4 .Iaddend..[.functions.]. .Iadd.function.Iaddend.to generate and transmit a stable microwave signal and toreceive the reflected signal and mix it with a sample portion of thetransmitted wave. .[.It.]. .Iadd.They .Iaddend.then .[.detects.]..Iadd.detect .Iaddend.the difference in frequency between thetransmitted and reflected wave, thereby determining the doppler shift.Conventionally, the microwave source is a Gunn effect diode mounted in atemperature compensated, tuned cavity which .[.radiates.]..Iadd.generates .Iaddend.a continuous 10.525 GHz .[.linearlypolarized.]. signal. The microwave circuit 2 is powered from a regulatedpower supply 3 which provides a 10 volt supply to the unit 1, and inparticular, to the microwave circuit 2. Input to the power supply 3 maybe from the radar platform (or patrol car) electrical system.

A mixer assembly 4 receives the input signal from the microwave circuitand detects the frequency difference between a sample transmitted signaland the reflected signals. The detected signal in turn is fed to apreamplifier 5 .[.which amplifies.]. .Iadd.where .Iaddend.the inputsignal .Iadd.is amplified and may then be gain controlled .Iaddend.and.[.transmits it.]. .Iadd.transmitted .Iaddend.to the remaining circuitryof the unit 1. .Iadd.Because some reflecting targets may be small anddistant or large and close, the detected signal can vary widely inamplitude. The automatic gain control (AGC) circuit shown in FIG. 2 andidentified by the letters AGC compensates for these amplitude variationsby precluding the associated circuits from exceeding their dynamicoperating range. .Iaddend.

As indicated above, a signal from the amplifier (5) is a complex wave,formed by the algebraic sum of the radar platform speed and the speed ofan approaching vehicle. In order to accurately count these twofrequencies, the signals must be separated. This is accomplished in theunit 1 by use of filter means which includes a fixed high pass filter, atracking high pass filter and a high doppler limiter in a channeldesignated by the numeral 7 and a fixed high pass and tracking band passfilter in a channel designated by the numeral 11 (FIGS. 1 and 3).

As suggested, the above filter means is a two channel device having aninput 400 from the preamplifier 5. A first channel 7 (FIG. 1) receivesthe doppler signal input and feeds it through a fixed high pass filter8, a tracking high pass filter 9 and a high doppler limiter 10. A secondchannel 11 receives the doppler signal input and feeds it through afixed high pass filter 12, a tracking band pass filter 13, and a lowdoppler limiter 14. The low doppler limiter 14 is electrically connectedto the filter means 6 through a switch assembly 15.

Filter 12 includes an amplifier I1B (FIG. 3) and is used to reject allfrequencies representing radar platform speeds below 10 miles per hour,corresponding to a frequency of .[.31.4 Hz.]. .Iadd.314 Hz. .Iaddend.Adiode CR1 and a diode CR2 are connected across the output of theamplifier I1B and are used to limit the AC component of the outputsignal of the amplifier .[.16.]. .Iadd.I1B .Iaddend.to a maximum .[.of0.4 volts, peak to peak.]..

Output from the amplifier I1B is inputted to the tracking band passfilter 13, same being a two element device, the individual elements ofwhich generally are indicated by the numerals 22 and 23.

An amplifier I4A and an amplifier I4B are the amplifiers for the two,two-pole cascaded tracking band pass filters 22 and 23. .[.A decimal.]..Iadd.Decimal .Iaddend.decoder .[.driver.]. .Iadd.drivers .Iaddend.I2and .[.a decimal decoder.]. I3 are used to select one of seven resistorsof a bank 402 and a bank 403 of the respective filters 22 and 23 and toswitch selected ones of those resistors to ground. Each of the sevenpairs of resistors in the banks 402 and 403 centers the frequency of thecombined band pass filter 13 to one of seven frequencies. Eachindividual frequency, as will be recognized by those skilled in the art,corresponds to a particular speed. The resistor banks 402 and 403 areswitched by a BCD code inputted to the channels 7 and 11 at connectionlines 404, 405 and 406. The BCD code used to switch the seven resistorsrepresents the "tens" digit in the patrol car speed as registered in adelayed counter generally indicated by the numeral 26 .Iadd.(I210 andI211) .Iaddend.in FIG. 4 and described in detail hereinafter. The limitsof the filtering provided by the filters comprising the channel 11 meansthat the radar unit 1 is able to track the speed of the radar platformor patrol car in a range between 10 miles per hour and 80 miles perhour. The radar platform speed is set initially as describedhereinafter.

An amplifier I1A (FIG. 3) is the first active element of channel 7 forthe fixed filter 8 having a cut out frequency of 1.3 KHz correspondingapproximately to 40 miles per hour. The filter 8 .[.eliminates.]..Iadd.attenuates .Iaddend.all doppler signals for which the combinedspeed of the radar platform and the speed of an approaching targetvehicle is less than 40 miles per hour. Amplifiers I6A and I6B are theactive elements of a selectable, five pole .[.chebyshev.]..Iadd.Chebyshev .Iaddend.high pass filter 9. The lower cut off frequencyof the filter 9 is switched by the same BCD signal from the counter 26.Iadd.(I210 and I211) .Iaddend.that switches the tracking band passfilter 13 except that the filter 9 is switched in multiples of 20 milesper hour. The cut off frequency of the filter 9 is approximately twicethe upper band pass filter 13 limit so that only approaching targetvehicle speeds near to or exceeding the radar platform's speed will bereadily recognized. Approaching vehicles at speeds much below the patrolcar's speed will only be detected when they are very close to the radarunit 1 as their doppler signal is greatly attenuated by the filter inthe channel 7.

A dual .[.BCD.]. MOS-FET switch 17 is utilized to switch variousresistors in the filter 9 to raise the cut off frequency of the filter.A plurality of diodes CR4 through CR9 switch respective ones of aplurality of resistors R43, R44, R53, R54, R61 and R62 to AC ground inparallel with resistors R41, R52 and R59 in response to the same BCDcode provided by the counter 26 along conductors 420 and 440 so that theChebyshev response is preserved for all cut off frequencies provided inthe filter 9.

The high doppler pulse of channel 7 thereafter is fed to a high dopplerlimiter 10. This limiter (10) includes an amplifier I5 .Iadd.(FIG. 3).Iaddend.which is a zero voltage crossing detector utilized to form thedoppler signals into a square wave. The squaring process eliminates muchof the amplitude variation of the doppler signals and provides an exacttime reference point for measuring the frequency of the signals.

The high doppler signal forms the input along a connection line 501 forhigh frequency doppler pulse shaping network 500 (see FIGS. 1 and 4)which includes a Schmitt trigger 49. Schmitt trigger 49 utilizestransistors Q202 and Q203 as the active elements and further acts toshape the high frequency doppler pulses. Output of Schmitt trigger 49 isinputted to a one-shot .[.I202B.]. .Iadd.I202b .Iaddend.which generatesa 0.6 microsecond pulse from the positive edge of the pulse input fromthe Schmitt trigger 49. The output of .[.I202B.]. .Iadd.I202b.Iaddend.is fed to a first high frequency doppler pulse selector 520 andto an OR gate .[.I205D.]. .Iadd.I205d .Iaddend.where it enters a speedcounter 525.

The low frequency doppler pulse of channel 11 is fed to a low dopplerlimiter 14 from I4B via conductor 410. Limiter 14 includes an amplifierI229 which functions as a zero voltage crossing detector and forms thedoppler signal from the filter 13 into a square wave. As in the case ofthe amplifier I5, this squaring process eliminates much of the amplitudevariation inherent in doppler signals and provides an exact timereference point for measuring frequency of the signal.

Transistors Q200 and Q201 are the active elements of a Schmitt trigger56 and form a low frequency doppler pulse shaping network 515 whichfurther shapes the low frequency doppler pulses of the channel 11. Aone-shot .[.I202A.]. .Iadd.I202a .Iaddend.performs the same function inthe channel 11 as the one-shot .[.I202B.]. .Iadd.I202b .Iaddend.performsin the channel 7.

The resultant .[.output.]. .Iadd.outputs .Iaddend.of the channels 7 and11 then are narrow 0.6 microsecond pulses occurring at the positive zerotransition of the doppler signal and therefore, each pulse representsone cycle of a doppler signal. The output of .[.I202A.]. .Iadd.I202a.Iaddend.is fed to a patrol car speed counter 530.

It may be observed (FIG. 1) that operation of a switch assembly 15placing the radar unit 1 in the stationary mode of operation, bypassesthe filter means 6 so that the output of the preamplifier 5 is feddirectly to the low doppler limiter 14, and in particular, to theamplifier I229 (FIG. 4) of the limiter 14. In the latter case the unit 1will directly measure the speed of oncoming vehicles when the police caris stationary, and the operation of the patrol car speed counter(described later) as well as other components, is obviated. The outputof the Schmitt trigger 56 and its associated one-shot .[.I202A.]..Iadd.I202a .Iaddend.is directed to a high frequency doppler addingcircuit means 60 (FIG. 1) for processing as described hereinafter.

The conversion of a doppler frequency to speed operates on the principlethat the frequency of the doppler signal corresponds to the formulaf_(d) =(2V/C) (f_(o)) where f_(d) equals the received doppler frequencyin Hz, V equals the velocity of the reflecting body in miles per hour, Cequals the speed of propagation of RF energy in miles per hour and f_(o)equals the transmitted frequency in Hz. The outputs of the one-shots.[.I200A.]. .Iadd.I202a .Iaddend.and .[.I200B.]. .Iadd.I202b.Iaddend.then have a pulse repetition derived from the same formula.Multiplying these signals by a properly chosen time signal will give anumber of pulses, thereby effecting time correlation. Consequently, anumber of pulses that occur in a specified time period will numericallyequal the relative speed of the object producing doppler signal.

The first low frequency doppler pulse that arrives, after each circuitrecycling, is selected by a selector 36 (FIGS. 1 and 4) and inputted toa primary time base generator 59 through a .[.connector.]..Iadd.conductor .Iaddend.36a. The first low frequency doppler pulsestarts the primary time base generator 59. A .[.31.858 microsecond.]..Iadd.31.875 millisecond .Iaddend.pulse is generated by the primary timebase 59 which is inputted to the low frequency doppler pulse shapingnetwork 515 via a conductor 515a.

The first low frequency doppler pulse also is .[.inputed.]..Iadd.inputted .Iaddend.via the conductor 36a, to a secondary time basecounter 63, which begins counting on the arrival of the first lowfrequency doppler pulse. Secondary time base counter 63 counts the timeinterval between the arrival of the first low frequency doppler pulseand the arrival of the first high frequency doppler pulse. The firsthigh frequency dopple pulse is obtained from the output of the highfrequency pulse shaping network 500 by a selector 520 via a conductor520a. The secondary time base .[.59.]. .Iadd.63 .Iaddend.stores thiscount until the end of the primary time base gate. It then counts offthe same length of time before closing the gate to the high frequencydoppler adding circuit means 60 (described later). This effectivelyshifts the gate to a high frequency doppler pulse counter 525 so that itbegins counting with the arrival of the first high frequency dopplerpulse to arrive after the first low frequency doppler pulse has passed.The counting scheme thus provided has the characteristic that no"rounding-off" of speeds is performed.

One of the primary elements for the radar unit 1 is a crystal oscillator61 (FIG. 1) which produces a 1.0280 MHz signal output. The output fromthe crystal oscillator 61 forms an input for the primary time base 59which will include a ripple counter .[. 62.]. (FIG. 5) formed by.[.I109A.]. .Iadd.I109a, .Iaddend.I110, I111, I112 and I113. Thiscounter .[.(62).]. divides the 1.0280 MHz signal from the oscillator 61to form a 31.875 .[.Msec.]. .Iadd.millisecond .Iaddend.gate pulse at aline 515a (FIG. 1). The gate pulse, as indicated above, .[.is used togate.]. .Iadd.initiates the gating of .Iaddend.the outputs of theone-shots .[.I202A.]. .Iadd.I202a .Iaddend.and .[.I202B.]. .Iadd.I202b.Iaddend.(FIG. 4) into counters. The ripple counter .[.62.]. .Iadd.ofprimary time base 59 .Iaddend.(FIG. 5) is reset by the first lowfrequency doppler pulse delivered via conductor 36a. When data is storedinto the .Iadd.ripple .Iaddend.counter .[.62.]., either a count of zeroor .[.thirty six.]. .Iadd.eighteen .Iaddend.is preset into the ripplecounter .[.62.]. by an interval selector .[.I109B.]. .Iadd.I109b.Iaddend.which acts as a .[.one-shot.]. .Iadd.flip-flop .Iaddend.counterthat changes state after every second missed count. Other pulses aretaken from the primary time base 59 (FIG. 1) for gating, calibration andtone generation.

Secondary time base 63 (FIGS. 1 and 5) is a cascaded 6 bit up/downcounter comprising I106 and I107 which counts 7.78 microsecond widepulses, starting at the trailing edge of the first low frequency dopplerpulse to arrive after the primary time base gate at .[.I108A.]..Iadd.I108a .Iaddend.opens, and stops counting with the arrival of thefirst high frequency doppler pulse via conductor 520a or a count of 256(3.98 .[.microseconds.]. .Iadd.milliseconds.Iaddend.), whichever comesfirst. It stores this count until the primary gate .[.I101B.]..Iadd.I101b .Iaddend.closes and then counts down the same number of 7.78microseconds wide pulses to a count of zero, which generates a borrowpulse at I107 and opens the gates to control pulses C1 and C2 via.[.I101B.]. .Iadd.I108b .Iaddend.and a connecting line 610a. Controlpulse C1 marks the end of the count in the high frequency doppler pulsecounter 525 (FIG. 1). Consequently, the gate to the high frequencydoppler pulse counter 525 has been independently shifted so that itbegins counting with the arrival of the first high frequency dopplerpulse after the first low frequency doppler pulse has passed.

The control pulses C1 and C2 are generated in a pulse generation circuit610 (FIG. 1) having an input connection line 615 from primary time base59.

C1 and C2 are 0.97 microsecond pulses generated from the primary timebase 59 at .[.I121E.]. .Iadd.I121e .Iaddend.and .[.I121B.]. .Iadd.I121b(FIG. 5) .Iaddend.respectively, if no speed violation is detected at.[.I125A.]. .Iadd.I125a.Iaddend.. A C1 pulse will appear at the outputof .[.I120A..]. .Iadd.I120a .Iaddend. 4.86 microseconds after thesecondary time base counter 63 has counted down to zero if the storedspeed of the patrol car in the delayed counter 26 (FIG. 1) does notmatch the speed just counted by the low frequency doppler pulse counter530. A C1 pulse will .Iadd.also .Iaddend.appear at the output of.[.I120B.]. .Iadd.I120b .Iaddend.(FIG. 5) if the stored speed of theapproaching vehicles inputted to .[.I120B.]. .Iadd.I120b .Iaddend.alongconnection line 586 does not match the count of the speed counter 525 atthat instant. If this pulse occurs, then the count in the speed counter525 is transferred to a speed storage register 535 .Iadd.(see I216, I218and I220 in FIG. 4) .Iaddend.and the C1 pulse marks the end of the highfrequency doppler pulse gate.

A C2 pulse occurs on the output side of .[.I123B.]. .Iadd.I123b.Iaddend.(FIG. 5) some 6.81 microseconds after the secondary time basecounter 63 has counted to zero. The trailing edge of the pulse, via line612, triggers a 1.8 microsecond one-shot .[.I227A.]. .Iadd.I227a.Iaddend.(FIG. 4) which in turn generates a delayed C2 pulse, hereinreferred to as C2 pulse on line 613, same being used for resetting theprimary gate and updating the counters. The delayed C2 pulse is,therefore a restarting pulse for the counting cycle.

.[.I201A, I204C and I203B.]. .Iadd.I201a, I204c and I203b .Iaddend.(FIG.4) form the low frequency doppler pulse selector 36. .[.I201A.]..Iadd.I201a .Iaddend.is a J-K flip-flop which forms a gate that openswith the arrival of each C2 pulse generated from .[.I227A.]. .Iadd.I227a.Iaddend.(the C2 one-shot) and closes with the trailing edge of thefirst low frequency doppler pulse .Iadd.(from I202a along conductor 540).Iaddend.to arrive after a C2 pulse has finished. .[.inputted from I202Aalong a conductor 540 I201A.]. .Iadd.I201a .Iaddend.allows the first lowfrequency doppler pulse, and no other, to appear inverted at the outputof .[.I204C.]. .Iadd.I204c.Iaddend.. The first low frequency dopplerpulse simultaneously is inputted along a conductor 545 and resets thepatrol car speed counter 530 to zero. As indicated above, .[.is.]..Iadd.it .Iaddend.also resets and starts both the primary time base 59and secondary time base counter 63. The gate function of .[.I201A.]..Iadd.I201a .Iaddend.also serves to preset the patrol car speed from thedelayed counter 26 via .[.a.]. conductor 550 and .[.I203B.]..Iadd.I203b.Iaddend., into the speed counter 525 (FIGS. 1 and 4) so thatthe speed counter 525 will be able to perform its subtraction operation,described in more detail later.

.[.I200A.]. .Iadd.I200a .Iaddend.(FIG. 4) and .[.I108A, I104D andI102F.]. .Iadd.I108a, I104d and I102f .Iaddend.(FIG. 5) form first highfrequency doppler pulse selector 520. .[.I108A.]. .Iadd.I108a.Iaddend.is a J-K flip-flop, set by the leading edge of the first lowfrequency doppler pulse inputted at .[.I108A.]. .Iadd.I108a .Iaddend.bythe common connection of the conductors 36a and .[.550.]. .Iadd.546.Iaddend.shown in FIG. 1. .[.I108A.]. .Iadd.I108a .Iaddend.opens thegate to the up count of the secondary time base counter 63 at.[.I100B.]. .Iadd.I100b (FIG. 5) .Iaddend.and simultaneously opens thegate formed by .[.I200A.]. .Iadd.I200a (FIG. 4) .Iaddend.via conductor425. .[.I200A.]. .Iadd.I200a .Iaddend.allows a high frequency dopplerpulse from .[.I202B.]. .Iadd.I202b .Iaddend.to pass after the first lowfrequency doppler pulse from the low frequency doppler selector 515, viaconductor 521, is finished. The high frequency doppler pulse from.[.I202B.]. .Iadd.I202b .Iaddend.appears inverted at the output of.[.I200A.]. .Iadd.I200a .Iaddend.and by way of conductor 520a,.[.I104D.]. .Iadd.I104d .Iaddend.and .[.I102F.]. .Iadd.I102f (FIG.5).Iaddend., resets the .[.I108A.]. .Iadd.I108a .Iaddend.flip-flop,thereby closing the gate to the up count of the secondary time basecounter 63, and closing the gate .[.I200A.]. .Iadd.I200a (FIG. 4).Iaddend.so that no more high frequency doppler pulses may pass. Theinverted first high frequency doppler pulse appearing at the output of.[.I200A.]. .Iadd.I200a .Iaddend.will be very narrow since the gate willshut off as soon as .[.I108A.]. .Iadd.I108a .Iaddend.is reset.

The patrol car speed counter 530 (FIGS. 1 and 4) is formed by integratedcircuits I206 and I207, which are cascaded, binary coded decimalcounters that count the inverted and gated low frequency doppler pulsesinputted from .[.I202A.]. .Iadd.I202a .Iaddend.along a conductor 555 inthe moving mode sent by switch assembly 15. I206 counts the units andI207 counts the tens of the patrol car speed at the end of the primarytime base gate input to the pulse shaping network 515. The counter ispreset to zero by the first low frequency doppler pulse inputted to I207and I206 via conductor 545 so that the counter begins counting with thesecond low frequency doppler pulse. In the stationary mode of operation,the counter is continually set to zero by the position of the switch.[.assembly 15.]. .Iadd.assemblies 15a and 15b (FIG. 4).Iaddend..

The output for the counter 530 forms an input for a patrol car's speedcomparator 560. I208 and I209, which form comparator 560, are cascadedcomparators that compare the count registered in the .[.partrol.]..Iadd.patrol .Iaddend.car's speed counter 530 to the count stored in thepatrol car's speed delayed counter 26 .Iadd.(I210 and I211).Iaddend.. Ifthe count in counter 530 exceeds the count in counter 26, then the countup gate .[.I204A.]. .Iadd.I204a .Iaddend.will be open. If the count incounter 530 is less than the count in counter 26, then the count downgate .[.I204B.]. .Iadd.I204b .Iaddend.will be opened. If the counts inthe .[.counter.]. .Iadd.counters .Iaddend.530 and 26 are identical, theoutput along a conductor .[.570.]. .Iadd.571 .Iaddend. will reset adelayed counter count pulse generator 565 (FIGS. 1 and .[.5.]..Iadd.4.Iaddend.) and a C1 pulse will be inhibited from appearing on theoutput of .[.I120A.]. .Iadd.I120a (FIG. 5).Iaddend.. Although thecomparator 560 works continuously, only comparisons at the end of thecounting cycle are used since its output are only used to gate C1 and C2pulse generator 610 (FIG. 1). If the count in the delayed counter 26does not equal the count in the patrol car's speed counter 530, no speedwill be displayed for an approaching vehicle.

Delayed counter 26 allows the band pass filter 13 to searchsystematically for the patrol car's speed even when the speed is not inthe pass band of the filter. In addition, once the speed is found, thedelay counter 26 holds the count even during brief intervals of randomlarge doppler signals near the frequency representing the speed of thepatrol car sometimes encountered for example when the patrol car isapproaching a slow moving truck or is being passed by fast movingvehicles.

The delayed counter 26 includes .[.I204A, I204B.]. .Iadd.I204a,I204b.Iaddend., I210 and I211 (FIG. 4). Basically, counter 26 is acascaded, two decade, BCD up/down counter which counts the units.[.I201.]. .Iadd.(I201) .Iaddend.and tens (I211) of the patrol.[.car'speed.]. .Iadd.car's speed.Iaddend.. Gates .[.I204A.]..Iadd.I204a .Iaddend.and .[.I204B.]. .Iadd.I204b .Iaddend.gate countpulses from the delayed count pulse generator 565 into the count up.Iadd..[.(I204A).]..Iaddend. .Iadd.(I204a) .Iaddend.or the count down.[.(I204B).]. .Iadd.(I204b) .Iaddend.input of the counter I210. When thedelayed counter 26 begins counting, a count limit detector I212.[.presents.]. .Iadd.presets .Iaddend.a speed .Iadd.into the tenscounter I211. This speed is .Iaddend.equal to the closest multiple of 20miles per hour that is less than a violation speed limit .[.preset intothe tens counter I211.]. .Iadd.set on the violation speed preset switch595 (shown in FIG. 1).Iaddend.. Counter 26 then counts pulses up ordown, depending on the output of the comparator 560 until the countequals the count in the patrol car's speed counter 530. Counter 26usually will begin counting down because the doppler signal is not inthe pass-band of the band-pass filter 13 and a count of zero miles perhour is registered until the pass band of filter 13 is switched near tothe doppler frequency by the delayed counter 26. In the stationary modeof operation, the delayed counter is continuously reset to zero by theswitch .[.assembly 15.]. .Iadd.assemblies 15a and 15b.Iaddend..

The count limit detector I212 compares the tens digit of the delayedcounter 26 (I211) to zero. When the delayed counter 26 counts below 10miles per hour, the next count pulse will reset the tens counter I211 tothe preset count described above.

Delayed counter count pulse generator 565, formed by integrated circuitsI228, .[.I200B, I204D and I203C.]. .Iadd.I200b, I204d andI203c.Iaddend., generates the pulses for the delayed counter 26. I228 isa binary 4 bit counter and, together with .[.I200B.]..Iadd.I200b.Iaddend., counts every eight C2 pulses generated fromI227A.]. .Iadd.I227a .Iaddend.if the comparator 560 does not register an"equal" comparison at .[.I204D.]. .Iadd.I204d .Iaddend.from .[.209.]..Iadd.I209.Iaddend., and directs this .[.eight.]. .Iadd.eighth.Iaddend.C2 count pulse to the count up gate .[.I204A.]..Iadd.I204a.Iaddend., count down gate .[.I204B.]. .Iadd.I204b.Iaddend.,and the count limit detector I212. Once the delayed counter 26 has foundthe speed of the patrol car by counting process described above,.[.I204D.]. .Iadd.I204d .Iaddend.presets a count of twelve into thegenerator 565 every time a C2 pulse is generated, and no additionalcount pulse will be generated. Once the delayed counter 26 has found thespeed of the patrol car, it will be able to correct a 1 mile per hourchange within 0.127 seconds. In other words, the counter 26 can trackthe speed of the patrol car if that speed does not change faster than 7miles per hour per second. The most difficult situation for finding thepatrol car's speed initially is when the violation speed limit is 80miles per hour or above and the patrol car is moving at 10 miles perhour. Under this condition, 17.84 seconds are needed to find the patrolcar's speed.

A patrol car speed up date counter 625 and a missed count counter 630(FIG. 5) are utilized in the unit 1 to control the suitable display ofpatrol car speed. It has been found that if three to five consecutiveequivalent counts are made in the patrol car's speed, then the count isa reliable representation of that speed. On the other hand, the large.[.hysteresies.]. .Iadd.hysteresis .Iaddend.in the delayed counter 26means that once the speed has been found, many miscomparisons can betolerated before the unit 1 actually has lost the speed of the patrolcar. In the radar unit 1, 42 .[.consecutive.]. missed comparisons.Iadd.before three to five consecutive equivalent counts (which resetsthe missed comparison counter) .Iaddend.indicate that the patrol car'sspeed is lost.

Another important consideration is the operation of circuits I206 andI207 (the counters which record the speed of the patrol car e.g. counter530) in conjunction with the delayed counter 26 .[.(I204A, I204B.]..Iadd.(I204a, I204b.Iaddend., I210 and I211). If the counted output fromthe combined circuits I206 and I207 is greater than the count in thecombined circuits I210 and I211, the outputs from the comparator circuitI209 gives a "count up" instruction. Conversely, if the count in I206and I207 is less than the count in I210 and I211, the outputs from thecomparator circuit I209 give a "count down" instruction. In this manner,if the patrol car is following a large truck, the radar effect whichnormally would require the unit to read the closing state (e.g. thedifference between the truck's speed and the patrol car's speed) isobviated. The comparators I208 and I209 actually blank the readoutmomentarily so no false readings are given unless the patrol car istraveling at the same rate of speed as the truck. This feature may bethought of as a fly-wheel effect. Since the unit ignores the falsereading and since the patrol car usually passes the slower truck in amatter of seconds, the speed recognized by the unit remains accurate.

Patrol car speed update counter 625 includes I117, .[.I204A.]..Iadd.I124a .Iaddend.and .[.I125C.]. .Iadd.I125c .Iaddend.(FIG. 5). I117is a 4 bit, binary counter which counts C2 pulses inputted alongconductor 613 from .[.I227A.]. .Iadd.I227a (FIG. 4).Iaddend.. Thecounter I117 is preset to a count of 12 and counts to a count of 16 from.[.I125C.]. .Iadd.I125c .Iaddend.or it is reset to a count of 12 when aC1 pulse appears on the output of .[.I120A.]. .Iadd.I120a.Iaddend.,indicating that the patrol car's speed in counter 530 .Iadd.(FIG. 4).Iaddend.does not match the count in delayed counter 26. When thecounter I117 is allowed to reach a count of sixteen, it will resetpatrol car speed missed count counter 630, which will remove one of thethree possible display blanking pulses. After a missed comparison, i.e.a C1 pulse, the counter I117 is preset to 12. Three microseconds later aC2 pulse should appear, making the count 13. Three more consecutive C2pulses, or equal speed comparisons, brings the count to 16 and removesthe blanking pulse.

Patrol car speed missed count counter 630 includes I115 and portions ofI114 and .[.I122C.]. .Iadd.I122c.Iaddend.. As best observed in FIG. 5,I115 and half of I114 form a cascade, 6 bit, binary counter which countsC1 pulses from .[.I120A.]. .Iadd.I120a.Iaddend., inputted to I115 alongconductor 640. When the up date counter 625 reaches a count of 16,indicating three consecutive equal comparisons, the missed count counter630 is reset to zero. Gate .[.I122C.]. .Iadd.I122c .Iaddend.is set togive a low output if a count of 42 or above is reached by the counterI115-I114. Forty-two missed counts will register a pulse on the outputof .[.I122C.]. .Iadd.I122c.Iaddend.. This output pulse will strobe acount of 47 to the counter I115 via conductor 645 which holds or latchesthe pulse until the count is reset to zero by the update counter 625.This missed count pulse at .[.I122C.]. .Iadd.I122c .Iaddend.is one ofthree pulses that can blank the display, indicated generally by thereference numeral 250 (in FIG. 1) through .[.I122B.]. .Iadd.I122b.Iaddend.and .[.I124D.]. .Iadd.I124d .Iaddend.and conductor 614. Thesame pulse also is inverted by amplifier .[.I124E.]. .Iadd.I124e.Iaddend.and is used for presenting a negative sign or horizontal bar onthe display via conductor 650. The horizontal bar alerts the operatorthat 42 missed counts have been observed by unit 1 while searching forthe patrol car's speed and that the unit 1 does not know the patrolcar's speed.

In the stationary mode of operation, no C1 pulses .Iadd.(from I120a).Iaddend.are generated so the update counter 625 counts continuouslyresetting the missed counter 630, thereby preventing the display fromblanking. .Iadd.The above is due to the fact that patrol car speedcounter 530 and delayed counter 26 are both held "reset to zero" therebygiving an equal comparison line 570..Iaddend.

The approaching vehicle's speed counter and patrol car speed subtraction525 (FIG. 4) basically is a three decade BCD up/down counter constructedwith integrated circuits I213 for unit count, I214 for ten count andI215 for hundred count. The gate used for selecting the first lowfrequency doppler pulse at .[.I201A.]. .Iadd.I201a.Iaddend., whichbegins with C2 and ends with the end of the first low frequency dopplerpulse, is fed, via an amplifier .[.I203B.]. .Iadd.I203b .Iaddend.andused to preset I213, I214 and I215 with the count from the delayedcounter 26 into the units and ten counter of the speed counter .[.55.]..Iadd.525.Iaddend.. A zero is loaded into the hundreds digit because thepatrol car's speed cannot be counted above 80 miles per hour.Consequently, after the first low frequency doppler pulse is completed,the patrol car speed is stored in the counter 525 and the counter 525 isready to count.

.[.I201B.]. .Iadd.I201b .Iaddend.is a J-K flip-flop used to gate thehigh frequency doppler pulses from .[.I205D.]. .Iadd.I205d .Iaddend.tothe count up .[.I205B.]. .Iadd.I205b .Iaddend.or the count down.[.I205A.]. .Iadd.I205a .Iaddend.input to the counter 525. Initially, aC2 pulse from .[.I227A.]. .Iadd.I227a .Iaddend.sets the flip-flop.[.I201B.]. .Iadd.I201b .Iaddend.high, opening the count down gate.[.I205A.]. .Iadd.I205a.Iaddend.. The count down operation subtracts onecount in the unit counter I213 for each high frequency doppler pulsereceived from .[.I205D.]. .Iadd.I205d.Iaddend.. When the units counterI213 reaches zero, the next pulse generates a borrow pulse thatsubtracts one ten unit from the ten counter I214 and registers a ninecount in the unit counter I213.

The speed counter 525 continues to count down until a count of 000 isreached. At this point, the speed of the patrol car has been subtractedout of the speed counter 525 and the remaining number of high frequencydoppler pulses that occur in the gated time interval will equal thespeed of the approaching vehicle. Therefore, the remaining dopplerpulses must be counted up or added in the speed counter. This isaccomplished by resetting the .[.I201B.]. .Iadd.I201b.Iaddend.flip-flop, opening the count up gate .[.I205B.]. .Iadd.I205b.Iaddend.to the counter 525. A one-shot .[.I227B.]. .Iadd.I227b.Iaddend.is triggered when the counter I215 attempts to borrow when thecount reaches 000. The pulse from the one-shot .[.I227B.]. .Iadd.I227b.Iaddend.resets the flip-flop .[.I201B.]. .Iadd.I201b.Iaddend.. Allremaining high frequency doppler pulses will then count up in a counterand the count at the end of the timing gate C1 will be the speed of theapproaching vehicle.

In the stationary mode of operation, only zeros are loaded into thecounter 525 because the count in the delayed counter 26 is zero.Flip-flop .[.I201B.]. .Iadd.I201b .Iaddend.is held in the reset positionby the switch .[.assembly 15.]. .Iadd.assemblies 15a and 15b .Iaddend.sothat the count up gate .[.I205B.]. .Iadd.I205b .Iaddend.is held open..[.No high frequency doppler pulses.]. .Iadd.Switch assemblies 15a and15b also inhibit one-shot I202b thus holding open gate I205d. Switchassembly 15 connects the preamplifier (5) output on conductor 400 to theinput of low frequency limiter 14, Schmitt trigger 56 and pulse shapingnetwork 515, thereby bypassing the filter network 6 (FIGS. 1 and 4).Doppler pulses from pulse shaping network 515 .Iaddend.are channeled tothe counter 525 through the switch assembly 15 via a conductor 575 andthe gate .[.I205D.]. .Iadd.I205d.Iaddend.. Since the low frequencydoppler pulses are gated by the primary time base, the count in thecounter 525 at the end of the cycle will equal the speed of theapproaching or retreating vehicle.

The speed storage register 535 receives the speed count from the counter525. A .[.C1.]. .Iadd.C1 .Iaddend.pulse on the output side of.[.I120B.]. .Iadd.I120b .Iaddend.indicates that the present speed countin counter 525 does .Iadd.not .Iaddend.equal the previous speed count inthe counter 525. The development of this C1 pulse .[.is.]. .Iadd.hasbeen previously .Iaddend.described .[.hereinafter.].. It is heresufficient to note that this C1 pulse (via conductor 615) is used tostrobe data from the speed counter 525 to the speed storage register 535which includes I216, I218 and I220. I216 stores the unit count; I218stores the ten count; and I220 stores the hundred count. The count incounter 525, when pulse C1 appears at the output of .[.I120B.]..Iadd.I120b.Iaddend., will be the exact speed of the target vehiclesince C1 pulses always occur at the end of the secondary time base. If aC1 pulse is not generated at .[.I120B.]. .Iadd.I120b.Iaddend., thepresent speed count in counter 525 equals the previous speed and thereis no need to reload the speed storage register 535.

An approaching vehicle speed comparator 585 is a cascaded, 4 bit datacomparator that includes integrated circuits I217, I219 and I221. I217,I219 and I221 respectively simultaneously compare the units, tens andhundreds count in the speed storage register 535 to the count in speedcounter 525. When these counts are equal, a positive pulse appears at aconductor 586. If this pulse occurs simultaneously with C1, then thespeed just counted is identical to the speed previously counted and C1is not produced at .[.I120B.]. .Iadd.I120b (FIG. 4).Iaddend.. If thepulse at I221 does not occur simultaneously with C1, then a C1 pulsestrobes the data input into the speed storage register 535, and iscounted in a missed counter 650 (FIG. 5).

A speed update counter 655 (FIG. 5) includes integrated circuits.[.I122A, I124B.]. .Iadd.I122a, I124b.Iaddend., and I116. The purpose ofthe update counter 655 is to ensure that five consecutive speed counts,both of the patrol car and of the approaching vehicle, are identicalbefore the unit 1 displays the count as being the speed of theapproaching vehicle. This eliminates the presentation of non-reliablecounts. Update counter 655 basically is a four-bit, binary counter I116which counts C2 pulses from conductor 613 and is reset to a count of 12by: (1) a C1 pulse from .[.I120A.]. .Iadd.I120a.Iaddend., whichindicates that patrol car's speed counts in comparator 560 (FIG. 4) donot match .[.[inputted at I224A].]. .Iadd.inputted at I122a.Iaddend.;(2) a C1 pulse from .[.I120B.]. .Iadd.I120b .Iaddend.which indicates thespeed counts in comparator 585 do not match .[.[at I112A].]..Iadd.inputted at I122a.Iaddend.; or (3) the first C2 pulse to arriveafter the counter I116 has counted to 16, indicating four identicalconsecutive comparisons have been made .[.[inputted at I122A].]..Iadd.inputted at I122a.Iaddend..

.[.I125D.]. .Iadd.I125d .Iaddend.and .[.I125B.]. .Iadd.I125b.Iaddend.(FIG. 5) provide a latch which is used to single out the firstC2 pulse to arrive after the update counter 655 has counted from twelveto sixteen, or the fifth consecutive C2 pulse to appear without theappearance of .[.C1.]. .Iadd.either C1 .Iaddend.pulse. The latched pulseindicates that five identical speed counts have been made so that thecount is reliable. In addition to resetting the update counter 655 via aconductor 660, the pulse is used to reset the approaching vehicle missedcounter 650.[.;.]..Iadd., .Iaddend.strobe data into a display driver andlatch circuit .[.655.]. .Iadd.665 .Iaddend.via conductor 686 and enablea violation signaling circuit 670.

The approaching vehicle missed counter 650 includes an eight bit binarycounter I118 and I119 which counts C1 pulses from .[.I120B.]..Iadd.I120b .Iaddend.indicating a missed comparison in the approachingvehicle speed. The counter is preset to a count 209 by the fifth C2pulse output from the update counter 655 .Iadd.via latch I125d and I125band conductor 660.Iaddend.. Missed counter 650 counts to a count of 256at which time .Iadd.conductor 675 from .Iaddend.I119 goes low, therebystrobing and holding a count of one on I118. The strobing pulse is alsoused to blank display 250, via a conductor 675.Iadd.,.Iaddend..[.I122B.]. .Iadd.I122b .Iaddend.and .[.I124D.]..Iadd.I124d.Iaddend., until the missed counter 650 is reset by theupdate counter 655 along a conductor .[.680.]. .Iadd.660.Iaddend.. If afifth C2 arrives from the update counter 655 before the missed counter650 counts to 256, then the .[.miscounter.]. .Iadd. missed counter.Iaddend.650 is reset and the display changes .Iadd.to .Iaddend.thespeed of the new approaching vehicle without blanking. The first bit inthe missed counter 650 is used to toggle the J-K flip-flop .[.I109B.]..Iadd.I109b .Iaddend.via conductor 685 which changes the length of thegate from the primary time base 59 (FIGS. 1 and 5). This changeeliminates the possibility that C1 pulses or missed counts developbecause of the fact that the last doppler pulse falls intermittentlyinside and outside of the time base gate from primary time base 59.Thus, at doppler signal frequencies of transition from one numeral tothe next, the uncertainty, which normally causes counts to alternate, isobviated. This time interval alteration is so small that its effect onaccuracy is negligible.

The LED display 250 (see FIG. 4) for the radar unit 1 includes two sevensegment light emitting diode displays R_(o) 202 for the units and R_(o)201 for the tens readout, and a .[.one.]. .Iadd.two .Iaddend.segmentdisplay R_(o) 200 for the hundreds read-out. The LED display 250 isdriven by the display driver and latch network 665 comprising compositeintegrated circuits I222, I223 and I224 which are each composed of afour bit latch memory, and a BCD decoder-driver having 47 ohm limitingresistors in the open collector outputs. The fifth C2 pulse via aconductor 686 from update counter 655 (in FIG. 5) strobes data to I222,I223 and I224 from speed storage register 535. Then if the blanking gatefrom .[.I122D.]. .Iadd.I122b .Iaddend.and .[.I124D.]. .Iadd.I124d.Iaddend.via conductor 614 is high, the data is displayed. A number ofoperations may be displayed and operated from a control panel in theradar unit 1, not shown. For example, a switching arrangement 687 may beprovided so that the segments of the LED display 250 may be checked forproper operation. R_(o) 200 .[.operates.]. .Iadd.includes .Iaddend.thehorizontal bar, which as described above, is actuated by the patrol carspeed .[.miscounter.]. .Iadd.missed counter .Iaddend.630 via a conductor650 .Iadd.and Q204 .Iaddend. to indicate that the .[.operator.]..Iadd.patrol car's .Iaddend.speed has not been calculated. R_(o) 200also .[.operates.]. .Iadd.includes .Iaddend.a vertical bar which isdisplayed to indicate that the supply voltage is below 11 volts, or thatthe .[.operator's.]. .Iadd.patrol car's .Iaddend.automobile battery hastoo low a charge to operate the radar unit 1. This condition isdetermined by a low voltage detector 690 whose signal along a conductor691 actuates .Iadd.the vertical bar portion of .Iaddend.R_(o) 200.

A violation comparator 590 .Iadd.(comprised of I225 and I226, FIG. 4).Iaddend.is provided which .[.received.]. .Iadd.receives .Iaddend.aninput from the speed storage register 535. A second input to thecomparator by a violation speed preset switch 595 (shown in block formin FIG. 1) is .[.inputed.]. .Iadd.inputted .Iaddend.to I225 and I226 atinput terminals generally indicated by the numeral 596. The violationspeed limit is programmed into the switch 595 by the operator. Thissignal is compared to the count in the approaching vehicle speed storageregister 535 by the comparators I225 units and I226 tens. Thecomparators I225 and I226 generate a high output on a conductor 597 ifthe stored speed exceeds or equals the programmed speed limit. Thispulse triggers the signal violation network 670 if five consecutiveidentical counts are registered by the speed update counter 655.

If the stored speed exceeds one hundred miles per hour, .[.I203A.]..Iadd.I203a .Iaddend.also will trigger the signal violation network 670via a conductor 598. Signal violation network 670 includes a violationlatch 671, a lock and automatic latch 672, a beep counter 673 and anaudio circuit 674.

The violation latch .[.670.]. .Iadd.671 .Iaddend.(FIGS. 1 and 5).Iadd.includes integrated circuits I101c and I103b which .Iaddend..[.is.]. .Iadd.are .Iaddend.controlled in part by the operation of aswitch assembly 73 .Iadd.(FIG. 1).Iaddend.. Violation latch .[.670.]..Iadd.671 .Iaddend.detects whether an output has been generated from the.[.speed count comparator 585.]. .Iadd.violation comparator 590 (FIG.4).Iaddend., whether the count, as determined from the update counter655 .Iadd.(FIGS. 1 and 5).Iaddend. , is good, and .[.then it.]..Iadd.when set, .Iaddend.blocks the generation of the timing pulses at.[.I125A.]. .Iadd.I125a .Iaddend.of the pulse generator 610. Thisprevents any further doppler pulse counting. The network 670 thengenerates a series of six, 1 KHz beeps at 0.255 second intervals andsimultaneously flashes the display 250. In the manual mode of operation,the unit 1 will then recycle, looking again for five consecutivereadings unless a lock button 74 of switch 73 is pressed. If the lockbutton 74 is pressed, the display 250 will continue flashing and thebeeping will cycle on and off. The display 250 will be locked on until arelease button 76 is pressed, which allows the circuit to recycle. Inthe automobile mode, the lock button .[.73.]. .Iadd.74 .Iaddend.isautomatically pressed and the violation speed will remain displayeduntil the release button 76 is pressed.

The violation latch .[.670 includes integrated circuits I101C and I103Bwhich.]. .Iadd.671 .Iaddend.will latch if the computed speed equals orexceeds 100 miles per hour, inputted from .[.I203A.]..Iadd.I203a.Iaddend., and the update counter 655 indicates that thecount is good. It also will latch if a lock and auto latch 672 islatched because of a connection line 688 between .[.I101A.]. .Iadd.I101a.Iaddend. and .[.I101C.]. .Iadd.I101c.Iaddend.. The violation latch.[.670.]. .Iadd.671 .Iaddend.will release if the release button 76 ispressed which grounds a conductor 680; or a beep counter 673 reaches acount of 16 from 10 and the lock and auto latch 672 is released. Theviolation latch .[.670.]. .Iadd.671 .Iaddend.functions to disable thegeneration of C1 and C2 pulses in the pulse generator 610 therebyeliminating the further computing of doppler pulses and updating; andallowing 0.1275 second pulses from the primary time base 59, and inparticular I114 thereof, to blank the display driver and latch 665,thereby flashing the display 250 four times per second. It also disablesan audio attenuation potentiometer (not shown) by turning off atransistor Q101 and at the same time decoupling high frequency dopplersignal from .[.I200D.]. .Iadd.I100d.Iaddend., thereby allowing thebeeping signal to be heard at full volume from its output of .[.I100C.]..Iadd.I100c.Iaddend..

Lock .Iadd.and .Iaddend.automatic latch 672 includes .[.I101A.]..Iadd.I101a .Iaddend.and .[.I104C.]. .Iadd.I104c.Iaddend.. Lock andautomatic latch 672 is set if the lock button 74 is pressed or.Iadd.automatically when a violation is detected .Iaddend.if theautomatic mode is closed at switch assembly 73 .Iadd.(FIG. 1).Iaddend.by the operator. It is released only by pressing the releasebutton 76. The lock and automatic latch 672 .Iadd.(FIGS. 1 and 5).Iaddend.serves the function of holding the violation latch .[.670.]..Iadd.671 .Iaddend."on" and inhibiting the data strobe on the beepcounter 673 thereby forcing it to continue counting in cycles of 16counts.

Pressing the lock button 74 will hold the number in the display 250 asit flashes and the beeping is heard, whether the speed represents aviolation or not. In the automatic position of switch 73, the display250 is held automatically when a speed violation is detected by theunit 1. The release button 76 will release the display in either mode ofoperation.

Beep counter 673 includes I105, .[.I103A, I102C, I102E and I100A.]..Iadd.I103a, I102c, I102e and I100a.Iaddend.. Beep counter 673 accepts0.1275 second pulses at .[.I103A.]. .Iadd.I103a .Iaddend.through.[.I102C.]. .Iadd.I102c .Iaddend.from the primary time base at I114 ifthe violation latch 671 is set. These timing pulses are used to blankthe display 250 four times per second through .[.I122B, I124D.]..Iadd.I122b, I124d .Iaddend.and a conductor 614. These timing pulsesalso gate the 1 KHz tone to an audio control 674 through .[.I24F.]..Iadd.I124f .Iaddend.and .[.I103C.]. .Iadd.I103c .Iaddend.which providesfour beeps per second. The timing pulses are counted by the four bitbinary counter I105 which has been preset to a count of 10 when theviolation latch .[.670.]. .Iadd.671 .Iaddend.and the lock and autolatch672 are both reset. Consequently, when the violation latch .[.670.]..Iadd.671 .Iaddend.is set, the counter I105 counts from ten to a countof 16, at which time I105 goes low and resets the violation latch.[.670.]. .Iadd.671 .Iaddend.via a conductor 692 and .[.I103B.]..Iadd.I103b.Iaddend.. If the lock and automatic latch 672 is not set,the counter I105 is reset to a count of 10 after six beeps and theviolation latch 671 remains reset allowing the counter I105 to acceptnew counts. If the lock and automatic latch 672 is set, the counter I105is not reset and the violation latch .[.670.]. .Iadd.671 .Iaddend.isinhibited from resetting. At this time, the counter I105 continues tocount with the display flashing but the 1 KHz beeping signal providedthrough audio control 674 is inhibited until a count of eight isreached. Thereafter, eight beeps will be heard until a count of 16 isreached by the counter I105. This portion of the unit 1 will continuerecycling until the reset button 76 is pressed.

The audio circuit includes audio control 674 .Iadd.(which is comprisedof I100d, I100c, I103c and I124f) .Iaddend.and an audio amplifier.[.690.]. .Iadd.693.Iaddend.. Under normal operation, the high frequencydoppler signal from the Schmitt trigger 49 is fed, via conductor 533, tothe .[.auio.]. .Iadd.audio .Iaddend.amplifier .[.690.]..Iadd.693.Iaddend., which includes a transistor Q102 and a transistorQ103 by way of integrated circuits .[.I110D, I100C.]. .Iadd.I100d, I100c.Iaddend.and an audio potentiometer resistor (not shown) indicatedgenerally by the numeral 301 in FIG. 5. The doppler signal may beattenuated to any level by the audio potentiometer resistor which may becontrolled from the front panel of the unit 1. When the violation latch671 is set, the audio .[.part.]. .Iadd.potentiometer resistor.Iaddend.is disabled by the opening of the transistor Q101 and the highfrequency doppler signal is decoupled at .[.I100D.]..Iadd.I100d.Iaddend.. The signal from the counter I105 via conductor 692and the .[.0.1255.]. .Iadd.0.1275 .Iaddend.second pulse from I114 gate a1 KHz signal from I112 of the primary time base 59 to the audioamplifier .[.690.]. .Iadd.693.Iaddend., through .[.I100C.]..Iadd.I100c.Iaddend.. This provides the 1 KHz beep when a violation hasoccurred or the lock button 74 is pressed.

As those skilled in the art will note, extensive use has been made ofintegrated .[.circuit.]. .Iadd.circuits .Iaddend.in the unit 1. Severalcomplex functioning devices are used for comparing, counting, storageand decoding functions with the internal configuration of and operationparameters made in accordance with conventional manufactured datasheets. For example, two counters manufactured by the SigneticCorporation and identified by their numbers .[.82801 and 82811.]..Iadd.8292 and 8293 .Iaddend.are extensively used. These two devicesoperate in a similar manner with the decimal counter .[.have.]..Iadd.having .Iaddend.a binary coded decimal output while the binarycounter has a hexadecimal output. In both of the above mentioneddevices, a negative transition at the input terminal advances the countby one step. Other data inputs, generally consisting of four other inputterminals, allows presetting to a desired count by application of anegative going strobe pulse to a strobe input terminal.Iadd...Iaddend.The strobe input may be used to reset to zero count if datainputs are grounded or held low during the strobe input. By cascadingthe counter and presetting by means of data inputs, any desired totalcount may be obtained. To save any respective count, inputs from eitherdevice allow it to be used as a storage or latch. Voltage levels presetdata inputs which will be transferred to the output terminals duringstrobe and the same will be held when the strobe is completed. Finally,the comparators discussed above are similar to those manufactured by.[.Signetics Corporation.]. .Iadd.Texas Instruments Corporation.Iaddend.(identification number .[.8241.]. .Iadd.74L85.Iaddend. ) witheach having a combination logic array which compares binary inputs.These comparators compare two four-bit binary numbers and two or moresuch devices may .[.have other outputs paralleled for.]. .Iadd.becascaded for comparing numbers of .Iaddend.greater than four bits..Iadd.Separate outputs exist to indicate results of equal, greater than,or less than. .Iaddend.

Other conventional uses include the conventional dual J-K binaryflip-flop using a .[.master-slave.]. .Iadd.master slave.Iaddend.principle which may also be used as a binary toggle and as aset-reset latch as well as in the J-K mode.

From the foregoing, it will be seen that this invention is one welladapted to attain all of the ends and objects herein set forth togetherwith other advantages which are obvious and which are inherent to thestructure.

It will be understood that certain features and subcombinations are ofutility and may be employed without reference to other features andsubcombinations.

As many possible embodiments may be made of the invention withoutdeparting from the scope thereof, it is to be understood that allmatters herein set forth or shown in the accompanying drawings is to beinterpreted as illustrative and not in any limiting sense.

Having thus described the invention, we claim:
 1. A doppler radar devicefor use in law enforcement and service vehicle speed surveillance andfor determining the speed of an approaching target vehicle when theradar platform vehicle is either moving or stationary, said devicecomprising:means for producing a continuously running time base; asingle means for receiving a composite doppler signal having componentsrelating to the speed of said target vehicle and the speed of the radarplatform vehicle; means for separating said doppler frequency into afirst frequency component and a second frequency component; means forcorrelating the frequency of said first frequency component with saidtime base; means for correlating the frequency of said second frequencycomponent with said time base; means for counting cycles of each of saidtime base correlated frequency components, said correlating means andsaid frequency component counting means cooperating to count each ofsaid frequency components in a preselected time increment, said timeincrement relating to said time base; means for subtracting said countedcycles of said first frequency component from said counted cycles ofsaid second frequency component; and means for displaying the resultfrom said subtracting means in .[.unit.]. .Iadd.units.Iaddend.indicative of speed of said approaching vehicle.
 2. Thecombination as in claim 1 wherein said means correlating said first andsecond frequency components with said time base includes gate means forinitiating the counting of the cycles of said first frequency componentafter said first cycle of said second frequency component has passed. 3.The combination as in claim 2 wherein said initiating means includes aprimary time base and a secondary time base counter, and means forinitiating the counting of clock pulses corresponding to the occurrenceof a preselected condition relative to said second frequency componentand stopping the counting corresponding to a preselected conditionrelative to said first frequency component.
 4. The combination as inclaim 3 including means for generating control pulses, at least one ofsaid control pulses being operable to restart the counting of saidsecondary time base counter.
 5. The combination as in claim 1 whereinsaid device includesmeans for assuming a speed count of said platformvehicle, means for storing said assumed speed count; means for updatingthe speed count of said platform vehicle, means for comparing saidassumed speed count to said updated speed count; and means forautomatically changing said assumed speed count to said updated platformspeed count at a rate of change not to exceed a predetermined maximum.6. The combination as in claim 1 wherein said radar device includes ameans for disabling said displaying means of said target means speedwhen a component of said received doppler signal could correspond to aclosing rate between the platform vehicle and another vehicle ratherthan the platform vehicle speed relative to the surface.
 7. Thecombination as in claim 6 wherein said disabling means includesmeans forstoring an assumed speed count of said platform vehicle, means forupdating the speed count of said platform vehicle, means for comparingsaid assumed speed count to the updated speed count, and means forautomatically changing said assumed speed count to said updated platformspeed count at a rate of change not to exceed a predetermined minimum,said disabling means being operable to preclude erroneous display oftarget vehicle speed during the operation thereof.
 8. The combination asin claim 1 wherein said supporting means includes a filter network, saidfilter network including a high pass filter means for rejecting theplatform vehicle speed frequency component.
 9. The combination as inclaim 1 wherein said separating means includes a filter network, saidnetwork having passing filter means for passing the platform vehiclespeed frequency components and for rejecting the target vehicle speedcomponents.
 10. The combination as in claim 9 wherein said passingfilter means is a band pass filter operable to reject erroneous thirdvehicle frequency components resulting from the closing speed of theplatform vehicle and the said third vehicle.
 11. The invention as inclaim 10 including means for electronically controlling the passingfrequency of said band pass and high pass filter means in response to anassumed speed count.
 12. The invention as in claim 8 including means forelectronically controlling the passing frequency of said band pass andhigh pass filter means in response to an assumed speed count.
 13. Thecombination as in claim 1 wherein said separating means includes afilter network, said filter network including a high pass filter meansfor rejecting the platform vehicle speed frequency components and apassing filter means for passing the platform vehicle speed frequencycomponent and rejecting the target vehicle speed components, and meansfor electronically controlling the passing frequency of said band passand high pass filter means in response to an assumed speed count. 14.The combination as in claim 1 including automatic gain control meansoperable to preclude the exceeding of the dynamic range of said deviceprior to separating said doppler signal.
 15. The invention as in claim 1wherein said second frequency component corresponds to the difference invelocity between said moving platform vehicle and said approachingtarget vehicle and wherein said first frequency component corresponds tothe velocity of said moving platform with respect to the surface.
 16. Amethod for determining the speed of an approaching moving vehicle, saidmethod comprising the steps of:receiving a composite doppler signal witha single receiving means; separating said composite dopper signal into afirst frequency component and a second frequency component; digitallyproducing a precise time base; digitally correlating said first dopplersignal frequency component with said time base; digitally correlatingsaid second doppler signal frequency component with said time base;counting the cycles of said first correlated doppler signal frequencycomponent; counting the cycles of said second correlated doppler signalfrequency component; subtracting the count of said first doppler signalfrequency component from said second .[.coppler.]. .Iadd.doppler.Iaddend.signal frequency component; and displaying the result of saidsubtracted count of correlated cycles.
 17. The method as in claim 16including the step of initiating the counting of the cycles of saidfirst frequency component after said first cycle of said secondcomponent has passed.
 18. The method as in claim 17 including the stepof causing said displaying means to ignore said target vehicle speedwhen said received dopper signal could correspond to a closing raterather than target vehicle speed.
 19. The method as in claim 16including the step of causing said displaying means to ignore saidtarget vehicle speed when said reached doppler signal could correspondto a closing rate rather than target vehicle speed.
 20. The method as inclaim 19 including the steps ofstoring an assumed speed count of saidplatform vehicle, comparing said assumed speed count to an updated speedcount, and correcting said assumed speed count at a rate not to exceed apredetermined maximum. .Iadd.
 21. The method as in claim 16, includingthe step of precluding said first and second frequency components fromexceeding a preselected amplitude range. .Iaddend..Iadd.
 22. Thecombination as in claim 1, including automatic gain control means forprecluding the device from exceeding its dynamic range under preselectedconditions. .Iaddend. .Iadd.
 23. A doppler radar device for use in lawenforcement and service vehicle speed surveillance and for determiningthe speed of an approaching target vehicle when the radar platformvehicle is either moving or stationary, the device comprising: a timebase means; a single means for receiving a composite doppler signalhaving components relating to the speed of said target vehicle and thespeed of the radar platform vehicle; automatic gain control means forprecluding said device from exceeding its dynamic range underpreselected conditions; means for separating said doppler signalfrequency into a first frequency component and a second frequencycomponent; means for correlating the frequency of said first frequencycomponent with said time base means; means for correlating the frequencyof said second frequency component with said time base means; means forcounting cycles of each of said time base correlated frequencycomponents, said frequency components counting means operable to counteach of said frequency components within preselected time increments,said time increments relating to said time base means; means forsubtracting said counter cycles of said first frequency component fromsaid counted cycles of said second frequency components; and means fordisplaying the result from said subtracting means in units indicative ofspeed of said approaching vehicle. .Iaddend. .Iadd.
 24. The combinationas in claim 23 wherein said automatic gain control means includescircuit means for precluding said first and second frequency componentsfrom exceeding a prescribed amplitude range. .Iaddend.